The History of the Semiconductor Industry

The semiconductor industry^[1] encompasses the companies engaged in the design, fabrication, and assembly of semiconductor devices, primarily integrated circuits. Emerging in the mid twentieth century, this sector has grown into a foundational pillar of the global economy. Semiconductors are materials, most commonly silicon and germanium, that possess electrical conductivity falling between that of a conductor and an insulator. In a pure silicon crystal, all valence electrons are bound in covalent bonds, making the material an insulator at absolute zero. At room temperature, thermal energy frees a small number of electrons, allowing limited conductivity. By doping these materials with specific impurities, engineers can precisely control their electrical properties. Introducing an element with five valence electrons, such as phosphorus, creates an excess of free electrons, forming n-type material. Introducing an element with three valence electrons, such as boron, creates an electron deficit or "hole," forming p-type material. The junctions between these differently doped regions form the physical basis of all modern digital logic and memory.

The economic scale of the semiconductor industry generates hundreds of billions of dollars in annual revenue and enables the entire modern digital ecosystem.^[11] From personal computing and global telecommunications to automotive systems and artificial intelligence hardware, nearly every contemporary technological advancement depends on the continuous improvement of semiconductor devices. The supply chain supporting this industry is highly globalized and capital intensive.^[12] It begins with the refinement of raw polysilicon to a purity level of 99.9999999 percent. This highly pure silicon is melted in a quartz crucible and drawn into massive cylindrical monocrystalline ingots using the Czochralski process. These ingots are sliced into ultra thin wafers, which are then shipped to specialized fabrication plants, known as fabs. These facilities operate cleanrooms that are thousands of times cleaner than a hospital operating room, utilizing precision optical equipment and specialized chemicals to pattern billions of microscopic transistors onto each wafer.

The historical trajectory of the industry is defined by a relentless drive toward miniaturization and cost reduction.^[13] This progression required continuous innovations in solid state physics, materials science, and photolithography. The industry transitioned from manufacturing discrete germanium transistors in the late 1940s to fabricating highly integrated silicon microprocessors containing tens of billions of components in the 2020s. This exponential growth in component density and computational power has dictated the pace of global technological advancement for over seven decades.

The Pre-Silicon Era and the First Transistors (1947 to 1954)

Before the invention of semiconductor amplifiers, electronic logic and signal amplification relied entirely on vacuum tubes. The thermionic valve, invented by John Ambrose Fleming, and the triode, invented by Lee de Forest, enabled the early development of radio, telephony, and computing. Vacuum tubes operated via thermionic emission, requiring high voltages to heat a metal cathode until it emitted electrons into a vacuum sealed glass bulb. A metal grid controlled the flow of these electrons to an anode. While effective, this mechanism consumed massive amounts of electrical power, generated excessive heat, and suffered from high failure rates due to burned out filaments and compromised vacuum seals. These physical constraints severely limited the complexity of early electronic systems. For example, the ENIAC computer, completed in 1945 to calculate artillery firing tables for the United States military, required 18,000 vacuum tubes. It consumed 150 kilowatts of electricity and required constant maintenance, as tubes failed on a daily basis.

Mervin Kelly, the director of research at Bell Telephone Laboratories, recognized that the national telephone network could not scale effectively using mechanical relays and vacuum tubes. He sought a solid state alternative and formed a dedicated solid state physics group in 1945, appointing physicist William Shockley as the manager. Shockley initially theorized a field effect transistor, hoping to control the conductivity of a semiconductor using an external electric field. However, his early experiments failed because surface states on the semiconductor material trapped the electrons, blocking the electric field from penetrating the bulk of the material.

Two other members of the group, John Bardeen and Walter Brattain^[2], took a different experimental approach. On December 16, 1947, they successfully demonstrated the first working point-contact transistor^[3]. They constructed the device using a small slab of germanium and a plastic wedge. They wrapped gold foil around the edge of the wedge and carefully sliced the foil at the apex, creating two distinct gold contacts separated by a fraction of a millimeter. When they pressed this wedge against the germanium crystal, they found that applying a small electrical current to one contact, the emitter, modulated a much larger current flowing through the other contact, the collector. This achieved the signal amplification that Kelly had envisioned. The Computer History Museum^[4] notes that Bell Labs publicly announced the device in 1948, coining the term "transistor" as a portmanteau of "transfer" and "resistor" (or "transconductance" and "varistor").

While the point contact transistor proved that solid state amplification was possible, it was difficult to manufacture reliably. The delicate physical contact between the gold foil and the germanium surface made the device fragile, and its electrical characteristics were highly unpredictable. Shockley, spurred by his exclusion from the initial point contact patent, spent a month developing a superior theoretical model. In early 1948, he formulated the theory of the bipolar junction transistor. Instead of relying on delicate surface contacts, Shockley's design used a continuous semiconductor crystal with alternating layers of p-type and n-type material, creating NPN or PNP structures. This design relied on the injection of minority charge carriers across the junctions within the bulk of the crystal. The junction transistor was far more robust and reliable than the point contact design. It entered mass production in the early 1950s and rapidly displaced vacuum tubes in hearing aids and portable radios, most notably the widely popular Regency TR-1 introduced in 1954. Bardeen, Brattain, and Shockley shared the 1956 Nobel Prize in Physics for their discovery of the transistor effect.

The Silicon Revolution and the Integrated Circuit (1954 to 1960s)

Early transistors were manufactured almost exclusively using germanium. Germanium was easier to purify than silicon, and its lower melting point made crystal growth more manageable. However, germanium suffered from significant thermal instability. At temperatures above 75 degrees Celsius, the intrinsic thermal energy freed enough electrons to overwhelm the carefully controlled doped charge carriers. This thermal runaway caused the device to fail, making germanium transistors highly unsuitable for military and aerospace applications, which required components capable of withstanding extreme environments.

Silicon offered a much wider bandgap than germanium, meaning it required significantly more energy to free intrinsic electrons. This allowed silicon devices to operate reliably at much higher temperatures. However, silicon melts at 1,414 degrees Celsius, compared to germanium at 938 degrees Celsius. At this high temperature, molten silicon becomes highly reactive, often absorbing impurities from the quartz crucibles used to hold it. In 1954, physical chemist Morris Tanenbaum at Bell Labs and Gordon Teal at Texas Instruments independently overcame these metallurgical challenges. They successfully grew high purity silicon crystals and produced the first working silicon transistors. Teal's rapid commercialization of the technology at Texas Instruments gave the company a dominant early lead in the military semiconductor market.

The epicenter of semiconductor innovation soon shifted to the Santa Clara Valley in California. In 1956, William Shockley moved to Mountain View to found Shockley Semiconductor Laboratory, intending to commercialize a new type of four layer diode. He recruited a team of brilliant young scientists and engineers, including Robert Noyce, Gordon Moore, Jean Hoerni, Jay Last, and Eugene Kleiner. However, Shockley's paranoid and abrasive management style alienated his core research team. In 1957, eight of his leading employees, later dubbed the Traitorous Eight, resigned en masse. They secured funding from investor Arthur Rock and industrialist Sherman Fairchild to establish Fairchild Semiconductor.^[14]

Fairchild Semiconductor initially focused on producing double diffused silicon mesa transistors. The mesa structure was created by etching away the edges of the silicon die, leaving the active regions raised on a small plateau. While electrically superior to grown junction transistors, the mesa structure left the delicate positive negative junctions exposed to the ambient environment. Microscopic dust particles and chemical contaminants could settle on the exposed junctions, causing electrical shorts and severe reliability problems.

In 1959, Swiss physicist Jean Hoerni^[5] invented the planar process to solve this contamination issue.^[14] During the high temperature diffusion process, a layer of silicon dioxide naturally forms on the surface of the silicon wafer. Previously, manufacturers etched this oxide away. Hoerni realized that silicon dioxide is an excellent electrical insulator. He proposed leaving the oxide layer in place to passivate and protect the underlying junctions. The resulting planar transistor was completely flat and highly robust. The planar process revolutionized semiconductor manufacturing because it allowed multiple components to be fabricated on a single side of a silicon wafer using batch photolithographic techniques, drastically reducing manufacturing costs and improving yield.

The planar process directly enabled the invention of the monolithic integrated circuit. In 1958, Jack Kilby at Texas Instruments demonstrated the first integrated circuit by building multiple components on a single piece of germanium. However, Kilby's design required hand soldered gold wires suspended above the chip to connect the components, a method that was entirely impractical for mass production. A few months later, in 1959, Robert Noyce at Fairchild Semiconductor realized that Hoerni's planar process provided a flat, insulating surface over the entire wafer. Noyce proposed depositing a thin layer of aluminum over the protective silicon dioxide and etching it to form the electrical connections between the transistors, resistors, and diodes on the same piece of silicon. This monolithic approach eliminated the need for manual wiring. Fairchild introduced the first commercial planar integrated circuits, the Micrologic family, in 1961, setting the standard for all future semiconductor fabrication.

Moore's Law, MOS Technology, and the Microprocessor (1960s to 1970s)

While bipolar junction transistors dominated the early integrated circuit market, a parallel breakthrough in device physics was taking place. In 1959, Dawon Kahng and Mohamed Atalla^[6] at Bell Labs invented the metal oxide semiconductor field effect transistor, or MOSFET. Previous attempts to build field effect transistors had failed because surface states on the semiconductor trapped electrons, blocking the electric field. Atalla and Kahng solved this by using thermal oxidation to grow a pristine, highly controlled layer of silicon dioxide on the silicon wafer. This oxide layer effectively neutralized the surface states. They then placed a metal gate electrode on top of the oxide. Applying a voltage to the gate created an electric field that penetrated the oxide and drew charge carriers to the surface of the silicon, forming a conductive inversion layer between the source and drain terminals.

The MOSFET was purely voltage controlled and drew almost no static current through the gate. It was significantly smaller, cheaper to produce, and consumed far less power than bipolar transistors. Although Bell Labs initially ignored the MOSFET because it was slower than their bipolar devices, companies like RCA and Fairchild recognized its immense potential for high density integrated circuits. In 1963, Frank Wanlass at Fairchild Semiconductor further advanced the technology by inventing complementary metal oxide semiconductor logic, or CMOS. By pairing p-channel and n-channel MOSFETs in a symmetrical configuration, Wanlass created a logic gate that only consumed significant power during the brief moment it switched states, reducing static power dissipation to near zero.

The predictable scaling of these high density circuits was famously articulated by Gordon Moore. In April 1965, Moore published an article in Electronics magazine titled "Cramming more components onto integrated circuits." He observed that the most cost effective number of components per integrated circuit had doubled every year since 1959 and projected that this exponential trend would continue. This observation, later dubbed Moore's Law^[7], became the guiding economic and technical roadmap for the entire semiconductor industry. Moore later revised the doubling period to approximately two years. The industry organized its research, development, and capital investment cycles around meeting this relentless cadence of miniaturization.

In 1968, Robert Noyce and Gordon Moore left Fairchild to found Intel Corporation. They initially focused on semiconductor memory, recognizing that solid state MOS memory could replace the bulky magnetic core memory used in mainframe computers. However, Intel's most profound contribution came in the realm of logic design. In 1969, a Japanese calculator company, Busicom, contracted Intel to design a set of twelve custom chips for a new electronic calculator. Intel engineer Ted Hoff reviewed the architecture and argued that designing twelve highly specialized chips was too expensive and inflexible. He proposed replacing the complex custom logic with a single, general purpose processor programmed via external read only memory.

The realization of this concept was led by Federico Faggin^[8], an Italian physicist who joined Intel in 1970. Faggin utilized his newly developed silicon gate MOS technology, which replaced the traditional aluminum gate with polycrystalline silicon, to design the Intel 4004. Released in 1971, the 4004 was the world's first commercial microprocessor. Packaged in a 16-pin dual in line package, it integrated 2,300 transistors onto a single chip and could perform 60,000 operations per second. Faggin, along with Hoff and Masatoshi Shima, proved that a single programmable architecture could replace dozens of specialized logic chips. The microprocessor centralized computational control, paving the way for the personal computer revolution of the late 1970s and 1980s.^[15]

The Rise of Global Manufacturing and the Fabless Model (1980s to 1990s)

As integrated circuits grew in complexity, incorporating tens of thousands of transistors, the traditional method of manually drafting chip layouts using colored pencils and rubylith film became impossible. The transition to Very Large Scale Integration, or VLSI, required a fundamental shift in design methodology. In 1979, Caltech professor Carver Mead and Xerox PARC researcher Lynn Conway published a seminal textbook titled "Introduction to VLSI Systems." The Mead Conway methodology abstracted the complex physics of semiconductor devices into standardized logic gates and geometric design rules based on a dimensionless parameter called lambda.

This methodology decoupled the logical architecture of a chip from the physical manufacturing process. It allowed computer scientists and logic designers to create complex integrated circuits using software algorithms without needing deep expertise in solid state physics or photolithography. This abstraction layer birthed the Electronic Design Automation industry. Companies like Cadence and Synopsys developed software tools that could automatically synthesize, place, and route millions of transistors, transforming chip design from a manual drafting exercise into a software engineering discipline.

During the 1980s, the United States semiconductor industry faced a severe competitive threat from Japan.^[16] Japanese firms like Toshiba, Hitachi, and NEC heavily invested in automated manufacturing and stringent quality control. They achieved significantly higher manufacturing yields and lower defect rates than their American counterparts, allowing them to capture the global market for dynamic random access memory, or DRAM. The intense price competition drove American companies like Intel to exit the DRAM market entirely and pivot exclusively to microprocessors. The United States government viewed the loss of semiconductor manufacturing leadership as a national security threat. In 1987, the Department of Defense and a consortium of fourteen American semiconductor companies formed Sematech^[9].^[16] The consortium pooled research and development resources to improve manufacturing yields, standardize equipment interfaces, and restore the competitiveness of the domestic semiconductor supply chain.

Simultaneously, a structural revolution was occurring in Taiwan that would permanently alter the industry's economic model. Historically, semiconductor companies operated as integrated device manufacturers, meaning they designed, manufactured, and tested their own chips in house. Building and equipping a fabrication plant required massive capital investment, creating an insurmountable barrier to entry for new startups. In 1987, Morris Chang^[10], a veteran executive from Texas Instruments and General Instrument, recognized that many companies had brilliant chip designs but lacked the capital to build a factory. With backing from the Taiwanese government and Philips, Chang founded the Taiwan Semiconductor Manufacturing Company, or TSMC.

TSMC pioneered the pure play foundry model. The company did not design or market its own chips; instead, it focused exclusively on manufacturing chips designed by other companies. Because TSMC never competed with its customers, it could pool the manufacturing volume of dozens of different designers, ensuring its expensive factories operated at maximum capacity utilization. This model democratized access to state of the art silicon manufacturing. It enabled the rise of "fabless" semiconductor companies, such as Nvidia, Qualcomm, and Broadcom. These companies could focus their capital entirely on architecture, software, and marketing without the financial burden of operating billion dollar factories. The symbiotic relationship between fabless designers and pure play foundries drove the rapid expansion of the mobile computing and graphics processing markets throughout the 1990s and 2000s.^[17]

Deep Submicron, FinFET, and EUV Lithography (2000s to 2020s)

As the industry pushed into the deep submicron regime in the 2000s, the physical limitations of silicon began to threaten the continuation of Moore's Law. For decades, the industry had relied on a principle formulated by IBM researcher Robert Dennard in 1974. Dennard scaling posited that as transistors shrank in physical size, their operating voltage and capacitance scaled downward proportionally. This meant that a smaller transistor could switch faster while consuming less power, allowing clock frequencies to increase exponentially without increasing the overall power density of the chip.

However, as gate lengths dropped below 90 nanometers, the insulating silicon dioxide layer beneath the gate became only a few atoms thick.