The History of the Microprocessor

The History of the Microprocessor

A microprocessor^[1] is a computer processor that incorporates the functions of a central processing unit on a single integrated circuit, or at most a few integrated circuits. The development of the microprocessor in the early 1970s changed the trajectory of computing, shifting the industry from room-sized mainframes and refrigerator-sized minicomputers to desktop personal computers and embedded systems. By consolidating the arithmetic logic unit, the control unit, and the internal registers onto a single piece of silicon, engineers dramatically reduced the physical size, power consumption, and manufacturing cost of computing hardware.^[43]

This consolidation was driven by rapid advancements in semiconductor manufacturing, specifically the transition from bipolar junction transistors to metal-oxide-semiconductor field-effect transistors. As photolithography techniques improved, manufacturers could etch increasingly microscopic transistors onto silicon wafers, a trend famously quantified by Moore's Law^[2]. The ability to pack thousands, and eventually billions, of transistors onto a single chip allowed designers to implement complex instruction sets, deep pipelines, and advanced microarchitectures that previously required multiple circuit boards of discrete components.^[44]

The history of the microprocessor is defined by continuous architectural refinement and intense commercial competition.^[45] Early designs were constrained by pin counts, thermal limits, and manufacturing yields, forcing engineers to make strict tradeoffs between instruction set complexity and hardware efficiency. Over five decades, these tradeoffs produced distinct eras of microprocessor design, from the early 4-bit and 8-bit microcontrollers to the 16-bit and 32-bit processors that powered the personal computer market, and finally to the 64-bit multi-core and heterogeneous systems that dominate modern desktop, server, and mobile computing.

Origins and the MOS Technology Transition (1950s to 1960s)

Before the microprocessor, computers were built using discrete components. The invention of the transistor in 1947 at Bell Labs replaced fragile vacuum tubes, but computers still required thousands of individual transistors wired together by hand. In 1958 and 1959, Jack Kilby at Texas Instruments^[3] and Robert Noyce at Fairchild Semiconductor independently invented the integrated circuit^[4], which allowed multiple electronic components to be fabricated on a single semiconductor substrate.

The commercial viability of the integrated circuit was secured by the Invention of the Planar Manufacturing Process^[5] by Jean Hoerni at Fairchild in 1959. Hoerni used a layer of silicon dioxide to protect the delicate semiconductor junctions, allowing circuits to be printed flat on a wafer using photolithography. Early integrated circuits relied on bipolar junction transistors. Bipolar logic was fast but consumed significant electrical power and generated substantial heat, which limited the number of transistors that could be safely packed onto a single chip.

In 1959, Mohamed Atalla and Dawon Kahng at Bell Labs invented the metal-oxide-semiconductor field-effect transistor. Initially, MOS transistors were slower than bipolar transistors, but they required far less power and occupied much less physical space on a silicon wafer. A critical breakthrough occurred in 1963 when Frank Wanlass at Fairchild Semiconductor demonstrated that a Complementary MOS Circuit Configuration^[6] could reduce standby power consumption by orders of magnitude. By pairing p-type and n-type transistors, CMOS logic only drew significant power during the switching phase, a property that would become essential for microprocessor design decades later.

During the 1960s, semiconductor companies refined MOS fabrication. Early processes used p-channel MOS logic, which was easier to manufacture but relatively slow and required high voltages. In 1965, Fairchild Semiconductor engineer Gordon Moore published a paper predicting that the number of components on an integrated circuit would double every year, a projection later revised to every two years. To maintain this pace, the industry needed to move beyond simple logic gates and memory chips toward large-scale integration, combining hundreds or thousands of gates to perform complex arithmetic and control functions.

By the late 1960s, the concept of a computer on a chip became a theoretical possibility. However, the physical constraints of packaging remained a severe bottleneck. Standard dual in-line packages had only 16 or 40 pins, limiting the amount of data and control signals that could be routed in and out of the chip simultaneously. Engineers had to multiplex signals over shared buses, which slowed down processing speeds. The challenge of the late 1960s was not just fabricating enough transistors, but designing a functional central processing unit that could operate within these strict pin and power limitations.

The First Microprocessors (1968 to 1972)

The transition from multi-chip central processing units to single-chip microprocessors occurred in overlapping stages between 1968 and 1972. Several projects claim the title of the first microprocessor, depending on how strictly the term is defined. Lee Boysel began designing the AL1 in 1968, but Four-Phase Systems was incorporated and completed the chip in 1969, an 8-bit arithmetic logic unit slice that could be expanded to 32 bits. While it contained many central processing unit functions, it required external logic for control and instruction sequencing.

In 1970, Steve Geller and Ray Holt of Garrett AiResearch completed the MP944 chip set for the Central Air Data Computer^[7], used in the US Navy F14 Tomcat fighter. The system used a highly integrated set of six MOS chips to perform complex aerodynamic calculations. Because the design was classified by the military until 1998, it did not influence commercial microprocessor development, but it demonstrated the viability of MOS large-scale integration for complex control systems.

The first commercially available, single-chip microprocessor was the Intel 4004^[8], released in November 1971.^[46] The project began when the Japanese calculator company Busicom approached Intel^[9] to design a set of custom chips for a new programmable calculator. Intel engineer Marcian Hoff realized that Busicom's proposed design, which required 12 custom chips, was too complex and expensive. Hoff, along with Stanley Mazor, proposed a general-purpose 4-bit processor that could be programmed via software to perform the calculator functions.

Turning this architectural concept into a working silicon chip required the expertise of Federico Faggin^[10], who joined Intel in 1970. Faggin had previously developed the silicon-gate MOS technology at Fairchild, which replaced aluminum gates with polycrystalline silicon, allowing for faster switching and denser transistor packing. Assisted by Busicom engineer Masatoshi Shima, Faggin designed the 4004 to fit 2,300 transistors^[11] onto a single chip. The 4004 processed data in 4-bit increments and was packaged in a 16-pin package, requiring external memory and input/output chips to function as a complete system. This achievement is widely recognized as the moment a Microprocessor Integrates CPU Function^[12] onto a single die.

Concurrently, Texas Instruments was developing the Texas Instruments TMS1000^[13], a 4-bit processor that integrated the central processing unit, read-only memory, and random-access memory onto a single chip. Gary Boone and Michael Cochran designed the TMS1802NC in 1971, which became the foundation for the TMS 1000 introduced in 1974, and it was widely used in embedded applications like calculators, toys, and appliances. Because it included memory and input/output on the same die, the TMS 1000 is often classified as the first microcontroller^[14] rather than a general-purpose microprocessor, a distinction noted in the Computer History Museum archive detailing how the Microcontroller Integrates Memory and I/O with CPU. The debate over Who Invented the Microprocessor? often centers on the distinction between these general-purpose and embedded designs.

The 8-bit Era and the Personal Computer Revolution (1972 to 1979)

The 4-bit processors were sufficient for calculators, but general computing required processors capable of handling 8-bit characters. In April 1972, Intel introduced the 8008, an 8-bit microprocessor originally commissioned by Computer Terminal Corporation for the Datapoint 2200 terminal. The 8008 was slow and constrained by its 18-pin package, but it proved that a single chip could handle text processing and basic computing tasks.

In 1974, Intel released the 8080, designed by Faggin and Shima. The 8080 utilized a 40-pin package, allowing for a 16-bit address bus and an 8-bit data bus, which meant it could directly address 64 kilobytes of memory. Running at a clock speed of 2 megahertz, the 8080 became the standard for early microcomputers, most notably powering the MITS Altair 8800, which ignited the hobbyist personal computer market.

The high price of the 8080 created an opening for competitors. A team at Motorola, led by Tom Bennett, introduced the 6800 in 1974 (development began in 1971). The 6800 required only a single 5-volt power supply, unlike the 8080 which required three different voltages. However, the 6800 was also expensive. Chuck Peddle^[15], an engineer on the 6800 team, argued for a lower-cost processor. When Motorola management refused, Peddle and several colleagues left to join MOS Technology.

At MOS Technology, Peddle's team designed the MOS Technology 6502^[16], introduced in 1975 at a price of just $25. The 6502 achieved its low cost by stripping out complex instructions and minimizing the silicon die area, which dramatically improved manufacturing yields. It featured a 1 megahertz clock speed, but its efficient pipelining allowed it to execute instructions faster than the 2 megahertz 8080 in many applications. The aggressive pricing of the 6502 forced Motorola and Intel to lower their prices and made microcomputers affordable for consumers. The 6502 became the central processing unit for a generation of iconic machines, including the Apple I and II, the Commodore PET, and the Atari 2600 video game console, an era where Microprocessors Flourish^[17].

Meanwhile, Federico Faggin and Ralph Ungermann left Intel to found Zilog. In 1976, Zilog released the Zilog Z80^[18], an 8-bit microprocessor that was binary compatible with the Intel 8080 but included a vastly expanded instruction set, built-in memory refresh circuitry, and required only a single 5-volt power supply. As detailed in the Zilog Z80 Microprocessor Oral History Panel^[19], the Z80 became the processor of choice for business microcomputers running the CP/M operating system, and it saw massive adoption in embedded systems, ensuring its production for decades.

Another highly specialized processor from this era was the RCA 1802, introduced in 1976. Unlike its competitors, the 1802 was built using CMOS technology. This made it exceptionally power-efficient and highly resistant to cosmic radiation. Because of these unique physical properties, the Microprocessor, RCA 1802^[20] was selected by NASA to act as the primary computer for the Galileo spacecraft, proving that microprocessors could survive the harsh environment of deep space.

The 16-bit Transition and the x86 Architecture (1978 to 1985)

As memory prices dropped and software became more complex, the 64-kilobyte memory limit of 8-bit processors became a severe constraint. The industry moved toward 16-bit architectures, which could process larger numbers and address significantly more memory.^[47]

Intel introduced the Intel 8086^[21] in 1978. The 8086 was a 16-bit processor that could address 1 megabyte of memory using a segmented memory architecture. Instead of a flat 20-bit address space, the 8086 combined a 16-bit segment register with a 16-bit offset to calculate physical addresses. To ease the transition for developers, Intel designed the 8086 instruction set to be source-code compatible with the older 8080, meaning assembly language programs could be translated mechanically. In 1979, Intel released the 8088, a variant of the 8086 with an 8-bit external data bus, which allowed manufacturers to use cheaper 8-bit support chips while retaining 16-bit internal processing.

The defining moment for the 8088 occurred in 1981 when IBM selected it for the original IBM Personal Computer. IBM chose the 8088 over competing processors because of the availability of support chips, Intel's ability to manufacture in high volume, and the ease of porting existing CP/M software to the new system. The success of the IBM PC established the Intel x86 architecture as the dominant standard for personal computing.

Motorola took a different approach with the Motorola 68000^[22], introduced in 1979. Unlike the 8086, which was constrained by backward compatibility, the 68000 featured a clean, orthogonal instruction set with 32-bit internal registers, a 16-bit arithmetic logic unit, a 16-bit external data bus, and a 24-bit address bus. It could address 16 megabytes of memory without the cumbersome segmentation used by Intel. As discussed in the Oral History Panel on the Development and Promotion of the Motorola 68000^[23], the 68000 was favored by programmers and was adopted for high-end workstations from Sun Microsystems, as well as a new generation of graphical personal computers, including the Apple Macintosh, the Commodore Amiga, and the Atari ST.

Despite the technical elegance of the 68000, Intel maintained its market share through aggressive marketing, notably the Operation Crush campaign. As recounted in the Intel Crush Oral History Panel^[24], Intel focused on selling the entire ecosystem of support chips, development tools, and field engineering support rather than just the microprocessor's raw performance, securing thousands of design wins that cemented the x86 legacy.

The 32-bit Era and the RISC vs. CISC Wars (1980s to 1990s)

The transition to 32-bit architectures in the 1980s brought microprocessors into direct competition with minicomputers and mainframes. Intel introduced the Intel 80386^[25] in 1985, a fully 32-bit processor that included hardware support for virtual memory and multitasking. The 80386 maintained strict backward compatibility with the 8086, cementing the x86 lineage while providing a flat 32-bit memory model that software developers desperately wanted. The subsequent 80486 further integrated the system by moving the math coprocessor and the Level 1 cache directly onto the processor die, vastly reducing memory latency.

However, the increasing complexity of processors like the 80386 and the Motorola 68020 sparked a debate in computer architecture. These processors used Complex Instruction Set Computer designs, where single instructions could perform multi-step operations, such as loading data from memory, performing arithmetic, and storing the result. Complex instructions required extensive microcode inside the processor to decode and execute, which consumed silicon area and limited clock speeds.

In the late 1970s and early 1980s, researchers at IBM, UC Berkeley, and Stanford University proposed an alternative: the Reduced instruction set computer^[26]. John Cocke's work on the IBM 801, David Patterson's Berkeley RISC project detailed in The case for the reduced instruction set computer^[27], and John Hennessy's MIPS architecture at Stanford demonstrated that simplifying the instruction set could lead to higher performance. By restricting instructions to simple, single-cycle operations, utilizing a load-store architecture, and relying on the compiler to optimize the code, RISC processors could run at much higher clock frequencies and easily implement pipelining, where multiple instructions are processed simultaneously in different stages.

During the late 1980s and 1990s, RISC architectures dominated the high-performance workstation and server markets. Sun Microsystems developed the SPARC architecture, Silicon Graphics adopted MIPS, and an alliance of Apple, IBM, and Motorola created the IBM PowerPC architecture. Digital Equipment Corporation pushed the boundaries further with the Alpha Architecture^[28], a pure 64-bit RISC design introduced in 1992 that achieved unprecedented clock speeds by stripping away all legacy architectural constraints. The academic and commercial debate over RISC vs. CISC^[29] defined the era's engineering constraints.

Intel responded to the RISC threat not by abandoning x86, but by adopting RISC techniques internally. The Intel Pentium^[30], released in 1993, featured a superscalar architecture capable of executing two instructions per clock cycle. Subsequent Intel processors, starting with the Pentium Pro in 1995, decoded complex x86 instructions into simple, RISC-like micro-operations before executing them. This hybrid approach allowed Intel to match the performance of RISC processors while maintaining compatibility with the massive library of Windows and DOS software, effectively ending the RISC versus CISC debate in the desktop market.

The 64-bit Transition and Multi-Core Processing (2000s)

By the early 2000s, the 32-bit memory limit of 4 gigabytes became a bottleneck for enterprise servers and high-end workstations. The transition to 64-bit computing resulted in a rare misstep for Intel. Partnering with Hewlett-Packard, Intel developed the Itanium^[31] architecture, a radically new 64-bit design based on Explicitly Parallel Instruction Computing. Itanium relied entirely on the software compiler to extract instruction-level parallelism and schedule operations. Crucially, Itanium lacked native, high-performance backward compatibility with 32-bit x86 software, which severely hindered its adoption.

Advanced Micro Devices^[32], Intel's primary competitor, took a more pragmatic approach. As detailed in the AMD corporate history^[33], AMD introduced the x86-64^[34] architecture in 2003 with its Opteron and Athlon 64 processors. This architecture extended the existing x86 instruction set to 64 bits while maintaining full performance for legacy 32-bit applications. The market overwhelmingly favored AMD's approach, forcing Intel to cross-license the AMD64 extensions and implement them in its own processors, effectively standardizing the 64-bit personal computer market around AMD's design.

Simultaneously, the microprocessor industry hit a physical barrier known as the power wall. For decades, manufacturers had relied on Dennard scaling^[35], a principle formulated by Robert Dennard in 1974 stating that as transistors shrink, their power density remains constant, allowing clock frequencies to increase without increasing overall power consumption. By the mid-2000s, Dennard scaling broke down. Transistors became so small that subthreshold current leakage increased dramatically, causing processors to generate unmanageable amounts of heat at clock speeds above 3 to 4 gigahertz. Intel's Pentium 4 NetBurst architecture, designed for extremely high clock speeds, suffered heavily from these thermal limits.

Unable to increase single-thread performance through higher clock speeds, manufacturers shifted to Multi-core processor^[36] designs.^[48] Instead of building one massive, fast central processing unit, engineers placed two or more independent processing cores on a single silicon die. In 2005, AMD released the Athlon 64 X2, and Intel released the Pentium D, followed shortly by the highly successful Core 2 Duo architecture which prioritized instructions per clock over raw frequency. This shift forced software developers to adopt parallel programming techniques, fundamentally changing how applications were written and optimized.

Mobile Computing and the ARM Dominance (1990s to 2010s)

While Intel and AMD fought for dominance in desktop and server markets, a different architectural lineage emerged for mobile devices. In the 1980s, the British company Acorn Computers developed the Acorn RISC Machine for its desktop computers. The architecture was designed with simplicity in mind, utilizing a very low gate count, which inadvertently made it highly power-efficient and cheap to manufacture.

In 1990, Acorn spun off its processor division into a separate company, Advanced RISC Machines Ltd., in a joint venture with Apple and VLSI Technology. Apple required a low-power processor for its Newton personal digital assistant. Although the Newton was a commercial failure, the ARM processor^[37] proved ideal for battery-powered devices.

Unlike Intel, ARM did not manufacture silicon. As outlined in the ARM corporate history^[38], the company licensed its instruction set and core designs to other semiconductor companies, such as Qualcomm, Texas Instruments, and Samsung. This intellectual property licensing model allowed manufacturers to integrate ARM cores with custom graphics, radio modems, and memory controllers on a single chip, creating a System on a chip^[39].

When the smartphone market exploded in the late 2000s, spearheaded by the Apple iPhone in 2007 and the subsequent rise of Android devices, ARM was the only architecture capable of delivering the required performance within the strict thermal and battery constraints of a mobile phone. Intel attempted to enter the mobile market with low-power x86 processors under the Atom brand, but the ARM ecosystem was too entrenched and the x86 instruction decoder inherently consumed too much power for passive cooling. Today, ARM-based processors power nearly all smartphones and tablets globally, utilizing advanced designs like the big.LITTLE architecture, which pairs high-performance cores with high-efficiency cores to maximize battery life.

Modern Architectures and Heterogeneous Computing (2010s to Present)

In the modern era, the definition of the microprocessor has expanded beyond the traditional central processing unit. The breakdown of Moore's Law, as transistor sizes approach the atomic scale and fabrication costs skyrocket, has forced designers to find performance gains through specialization rather than raw transistor scaling.

Modern microprocessors are highly integrated heterogeneous systems. A contemporary System on a Chip includes not only multiple general-purpose processing cores, but also dedicated hardware accelerators. These include graphics processing units for rendering and parallel mathematics, neural processing units for artificial intelligence and machine learning workloads, and specialized image signal processors for computational photography.

This trend is exemplified by Apple's transition away from Intel processors for its Macintosh computers. In 2020, Apple introduced the Apple M1, a custom ARM-based System on a Chip. By tightly integrating the central processing unit, graphics processing unit, and unified memory on a single package, the M1 achieved performance and power efficiency metrics that traditional discrete x86 processors struggled to match. This transition signaled a broader industry shift, with cloud providers like Amazon and Google also designing custom ARM-based processors for their data centers to optimize power and cooling costs.

To combat the rising costs and lower yields of manufacturing massive monolithic chips, companies have turned to advanced packaging techniques. AMD pioneered the mainstream use of chiplets with its Zen architecture, detailed in IEEE research on Chiplet Architecture for High-Performance Server and Desktop Systems^[40]. Instead of fabricating one large processor, AMD manufactures smaller, high-yield processor modules and links them together on a single substrate using a high-speed interconnect. This modular approach allows for massive core counts without the exponential cost penalties of large-die manufacturing.

Simultaneously, the open-source movement has reached microprocessor hardware. The RISC-V^[41] instruction set architecture, developed at UC Berkeley in 2010, provides a royalty-free, open standard for processor design. RISC-V allows researchers, startups, and established companies to design custom cores without paying licensing fees to ARM or Intel, lowering the barrier to entry for hardware innovation and encouraging specialized designs for the Internet of Things and embedded systems.

The microprocessor remains the foundational technology of the digital age. From the 2,300 transistors of the Intel 4004 to modern chips containing tens of billions of transistors, the microprocessor's evolution reflects a continuous negotiation between the laws of physics, manufacturing economics, and the insatiable demand for computational power. As the industry navigates the physical limits of silicon, future advancements will increasingly rely on advanced packaging techniques, specialized accelerators, and domain-specific architectures, ensuring The Smart IC: Microprocessors^[42] continue to evolve in complexity and capability.